Frequency shift keying (FSK) modulation is a method often used to transmit digital data over a communications link. The data is typically transmitted on a carrier signal which includes positive and negative frequency deviations that represent the digital data. FSK demodulation is a technique used to extract the digital representation of the transmitted data by measuring the frequency deviations.
Typical prior art techniques for FSK demodulation include, inter alia, tracking PLLs, tuned LC tank discriminators, matched filters, and quadri-correlators. One example of a conventional FSK demodulation technique is to employ a loop-filter voltage in a tracking PLL as the demodulator output voltage. The PLL bandwidth is optimized to track the input frequency changes and the received bit stream can be recovered by threshold detecting the loop filter output voltage. However, additional filtering of the loop filter voltage is typically required before the signal can be reliably detected by a slicer with good signal to noise ratio (SNR). Moreover, frequency aided acquisition is typically required to achieve fast lock time to the message preamble. The result is an increase in the overall complexity and power dissipation of the tracking PLL. Such a design does not perform well with integrated receiver architectures that operate with near zero IF due to the large time constants involved.
Conventional LC tank discriminators may also be utilized for frequency demodulation. However, some form of tuning or calibration is usually required to optimize the discriminator gain and to center the data slicer threshold at the IF frequency. Moreover, while tuned LC tank resonators have been successfully integrated in CMOS technology, the silicon area of a fully integrated LC tank discriminator is prohibitive for practical applications. The LC tuned circuit also consumes significant power and does not operate well with low power and/or low IF receiver designs.
Quadri-correlators are often employed in FSK demodulators because they are less complex in design and utilize less power. A typical FSK demodulator which incorporates a quadri-correlator, such as U.S. Pat. No. 4,987,334, incorporated herein by reference, employs a design which is centered around a zero IF. Operating at zero IF produces DC offset and the problems associated therewith, as well as low frequency noise when CMOS technology is employed. Other prior art FSK demodulators which employ quadri-correlators overcome the problems associated with operating at zero IF frequencies by operating at high IF. However, at high IF the power dissipation becomes a problem.
Another conventional FSK demodulator is disclosed in U.S. Pat. No. 5,053,717, incorporated by reference herein. The '717 patent employs a DC offset correction loop with a demodulator to minimize DC offsets at the output of the demodulator. In this design, a DC offset correction loop must be utilized because the multiplier inputs are operating at baseband (zero IF). However, implementing the DC offset correction loop requires an additional analog-to-digital converter, amplifier and filter which increases the overall complexity and power dissipation of the system.
Conventional FSK demodulators/frequency discriminators which employ quadri-correlators typically exhibit a linear frequency to voltage characteristic and therefore do not perform spectral shaping or filtering of the FSK spectrum to maximize the demodulator output SNR.